An addressing technique with reduced hardware complexity
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Abstract
An addressing technique, with reduced hardware complexity of column drivers is presented. Choice of various parameters which will lead to a large reduction in hardware complexity will be discussed. A 50% reduction in hardware complexity is possible in some cases.
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Proceedings of the SID international symposium: Digest of technical papers, p65, SID, 1994.
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Proceedings of the SID international symposium, 1994, p65-68
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